SiT95316 网络同步器提供可编程四分数频率转换,具有灵活的输入到输出频率转换选项。高性能 DPLL 支持多达 4 个差分或 8 个单端输入时钟,并提供 12 个时钟输出。时钟输出可以以完全灵活的方式从 4 个 PLL 中的任何一个获得。该器件可通过 I2C/SPI 接口或工厂预编程器件的片上一次性可编程 (OTP) 非易失性存储器进行完全编程。
"眼镜" | "Value" |
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Operating Temperature Range (°C) | -40 to 85 |
Package Type (mm²) | 9x9 mm, 64-pin QFN |
Number of Inputs | 4 |
Number of Outputs | 12 |
Input Type | LVCMOS, LVDS, LVPECL, CML |
Input Frequency Range | 0.5 Hz to 2.1 GHz (Differential) |
Output Type | LVPECL, CML, HCSL, LVDS, LVCMOS |
Output Frequency Range | 0.5 Hz to 2.94912 GHz (Differential) |
Number of PLL/Clock Domains | 4 PLL |
Phase Jitter (rms) | 85 fs typ.; 70 fs typ. (with MEMS oscillator) |
Repeatable Input-Output Delay | ±225 ps |
Frequency Control DCO | 0.001 ppt (all outputs) |
Phase Control DCO | <1 ps (all outputs) |
Internal ZDB Mode | <0.5 ns input to output delay variation |
Programmability | NVM OTP, External EEPROM, Partial autonomous, SPI/I2C |
Features | Wander attenuation loop bandwidth down to 0.09 mHz, ±25 ps maximum phase hit, JESD204B/C support |
Availability | Production |
64-pin 9x9 mm QFN Clock Generators - Network Synchronizers - Jitter Cleaners package
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